1. Field of the Invention
The present invention relates to semiconductor integrated circuits of a dielectric isolation type and a method of manufacturing the same. In particular, the invention concerns such circuits which have a structure for reducing an electrostatic coupling between circuit elements.
2. Description of the Prior Art
Of ways for providing isolation between circuits of semiconductor integrated circuits, the dielectric isolation structure is advantageous over the PN-junction isolation structure in that the parasitic presence of undesirable active elements in the semiconductor chip can be evaded. In the dielectric isolation structure, a perfect insulation in the sense of D.C. current can be assured for the chip by the dielectric insulation films of, for example, SiO.sub.2. Further, no electrical connection to the chip substrate (usually made of a polycrystalline semiconductor) has hithertofore been required and therefore the substrate remains in an electrically floating state.
However, the dielectric isolation structure which can be excellently applied to usual applications has a drawback that cross-talks are produced between the circuit elements by an electrostatic coupling due to an electrostatic capacitance formed by the dielectric insulation films and the chip substrate, with the result that a desired performance cannot be obtained in high frequency analog switches or integrated circuits processing super high speed digital signals, for example, integrated circuits of a speech path system in a communication device processing signals of frequencies higher than several MHz.